The switch architecture may be a bit beyond the CCIE lab topic, but here
goes...
Each of the listed controllers represents a Satelite ASIC which controls
a port (GigE) or ports (Fast Ethernet). The ASIC is then responsible
for deciding either to forward the packet onto the switch fabric or to
send it back out a local port.
LOTS more detail in the following:
http://www.cisco.com/networkers/nw02/post/presentations/docs/RST-222.pdf
I think you need a CCO ID to get to that link. If you can't get to it,
respond privately.
Thanks!
Frank Jimenez, CCIE #5738
Systems Engineer
Cisco Systems, Inc.
franjime@xxxxxxxxx
-----Original Message-----
From: nobody@xxxxxxxxxxxxxx [mailto:nobody@xxxxxxxxxxxxxx] On Behalf Of
Jay Greenberg
Sent: Monday, January 06, 2003 10:48 AM
To: ccielab@xxxxxxxxxxxxxx
Subject: 3550 Ethernet Controllers
Does anyone know why the 3550 ports share ethernet controllers? What
are the side-effects / benefits (?) of this?
#sh ver
blah...
Switch uptime is 4 minutes
System returned to ROM by power-on
System image file is
"flash:/c3550-i5q3l2-mz.121-9.EA1c/c3550-i5q3l2-mz.121-9.EA
1c.bin"
blah...
Running Layer2/3 Switching Image
Ethernet-controller 1 has 12 Fast Ethernet/IEEE 802.3 interfaces
Ethernet-controller 2 has 12 Fast Ethernet/IEEE 802.3 interfaces
Ethernet-controller 3 has 12 Fast Ethernet/IEEE 802.3 interfaces
Ethernet-controller 4 has 12 Fast Ethernet/IEEE 802.3 interfaces
Ethernet-controller 5 has 1 Gigabit Ethernet/IEEE 802.3 interface
Ethernet-controller 6 has 1 Gigabit Ethernet/IEEE 802.3 interface .
.
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